AI-Accelerated EDA Solutions
SiClarity delivers AI-accelerated EDA solutions that co-optimize cell design and process flow, empowering fabless semiconductor companies, foundries, and tool suppliers to achieve unparalleled efficiency and performance.
Overview
SiClarity is enabling a new era of AI-Accelerated EDA tools and support technology.
- Machine Learning and generative design solutions for physical design
- Design, device and process co-optimization
- 3D visualization of design and process
- AI enabled predictive parasitics for layout and device optimization
- Hybrid bond and route aware platforms
Design
Comprehensive product portfolio addressing industry challenges
SiClarity is fluent in advanced architectures including GAA and CFET with and without backside power. Engineers can quickly assess design merit and options of multiple paths in one platform.
SiClarity supports SOW engagements running models on SiClarity hardware and deployed licenses where the software is running entirely on the customers hardware.
A MUX2x1 cell is optimized using backside power CFET design rules and the results show the impact of changing the number of routing tracks.
SiClarity takes as input transistor level netlists for logic cells and industry standard terminology for design rules to provide high performance place and route solutions with metrics on area, metal volume, predictive capacitance and resistance.
Solutions
SiClarity technology generates 3D models from the layouts and uses the 3D information to further refine predictions on capacitance and resistance.
SiClarity predictive capacitance solutions show excellent match to rigorous calculations and are completed 200x faster than latest industry tools. In this example, over 600 layouts for an AOI cell were evaluated with the lowest and highest capacitance layouts shown.
With proprietary methods to optimize placement of transistor level netlists, SiClarity has demonstrated placement up to 216 transistors with a 6 bit adder. SiClarity software can optimize standard cells first to build a full adder or co-optimize all transistors simultaneously.
For more information or to discuss your design and process challenges, Contact SiClarity
Discover Our Cutting-Edge Technology
Contact us for more information or to schedule a demonstration.